1. Field of the Invention
The present invention relates to a method for fabricating a solid-state imaging device. More particularly, the invention relates to a method for fabricating a solid-state imaging device in which channel stop regions are formed in the surface region and in internal regions by injecting impurities, the channel stop regions being located between light-receiving sections.
2. Description of the Related Art
In order to improve the sensitivity of a solid-state imaging device, in a known technique, an overflow barrier region is formed deep in a semiconductor substrate, and high-resistivity depletion regions under light-receiving sections (photosensors) are extended in the depth direction.
FIG. 1 is a partial sectional view which shows a solid-state imaging device having extended depletion regions, and FIG. 2 is a partial plan view of the solid-state imaging device shown in FIG. 1. FIG. 1 is the sectional view taken along the line I—I of FIG. 2.
As shown in FIG. 2, in a solid-state imaging device 12, a plurality of light-receiving sections 14 are arranged in a matrix on a semiconductor substrate 22. A vertical charge transfer register 16 is provided for each column of the light-receiving sections 14. Signal charges generated by each light-receiving section 14 in response to light are fetched by the adjacent vertical charge transfer register and are transferred vertically (in the V direction shown in FIG. 2). At the ends of the vertical charge transfer registers 16, a horizontal charge transfer register (not shown in the drawing) extends perpendicular to the direction in which the vertical charge transfer registers 16 extend. The signal charges from each column of the light-receiving sections 14, which are transferred through the corresponding vertical charge transfer register 16, are supplied to the horizontal charge transfer register, are transferred horizontally (in the H direction shown in FIG. 2), and are finally output as image signals.
Each vertical charge transfer register 16 includes first transfer electrodes 18 and second transfer electrodes 20, and as shown in FIG. 2, the first transfer electrodes 18 and the second transfer electrodes 20 are placed alternately in the V direction so as to be partially overlapped with each other. The corresponding first transfer electrodes 18 and second transfer electrodes 20 of the individual vertical charge transfer registers 16 are connected to each other and they are driven in phase.
As shown in FIG. 1, in the solid-state imaging device 12, at a deep position, for example, at a depth of 3 μm or more, of a semiconductor substrate 22 of a first conductivity type, for example, n-type, an overflow barrier region 24 which is a semiconductor well region of a second conductivity type, for example, p type, is formed. A high-resistivity semiconductor region, i.e., a so-called high-resistivity epitaxial layer (depletion region) 26, having a higher resistivity than that of the overflow barrier region 24, is formed by epitaxial growth on the overflow barrier region 24. The high-resistivity epitaxial layer 26 has a thickness of 2 μm or more, and preferably, 5 μm or more, and is formed as a p-type region or n-type region having a lower concentration than that of the overflow barrier region 24, or as a non-doped (intrinsic semiconductor) region.
The light-receiving sections 14, each including a high-concentration p-type region 28 and an n-type region 30, are formed at a distance in the surface region of the semiconductor substrate 22. The transfer electrodes 18 and 20 are deposited with an insulating layer 32 therebetween on the surface of the substrate between two adjacent light-receiving sections 14. The surface of the substrate except the light-receiving sections 14 is covered with a shading film 34.
Between two adjacent light-receiving sections 14, a p-type region 36 is formed in the surface region, and a low-concentration p-type region 38 is formed in the internal region above the overflow barrier region 24, the p-type region 36 and the p-type region 38 being vertically aligned. The p-type regions 36 and 38 constitute a channel stop region 40. The p-type region 38 is formed, for example, at a depth of 1 μm or more from the surface of the substrate. By forming such a channel stop region 40, holes generated by photoelectric conversion in the deep region of the light-receiving section 14 can also be transferred to the channel stop region, and the light-receiving sections 14 can be isolated reliably so that color mixing between pixels can be prevented.
FIGS. 3A to 3C show the process for forming the channel stop regions 40, each including the p-type region 36 located in the surface region and the p-type region 38 located in the internal region in the semiconductor substrate 22.
First, as shown in FIG. 3A, a photoresist layer 44 having openings 42 corresponding to channel stop region-forming positions is formed on the surface of the semiconductor substrate 22. Next, as shown in FIG. 3B, using the photoresist layer 44 as a mask, a p-type impurity is ion-implanted at a relatively high energy to form the p-type region 38. Then, as shown in FIG. 3C, using the photoresist layer 44 as a mask, a p-type impurity is ion-implanted at a relatively low energy to form the p-type region 36.
However, when the channel stop region 40 is formed by the method described above, when the p-type region 38 is formed in the internal region, a high ion-implantation energy is required, and in particular, when the region is the deep region of the substrate, the ion-implantation energy is 1 MeV or more and the photoresist layer 44 must have a thickness of 3 μm or more so as to withstand such a high energy. As a result, it is difficult to form a fine mask pattern of the photoresist layer 44, and it is not possible to scale down the channel stop regions 40. Therefore, the array pitch of the light-receiving sections 14 is limited, which is an obstacle to the miniaturization of the solid-state imaging device 12 and an increase in density in the solid-state imaging device 12.